 27 Mar 2019 08:57, Pierre, Configuration, Hardware, CERN setup
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Found that the Trigger out from the CB is on output1
Trigger / Not used
Clock / Not used
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11 Mar 2019 12:30, Thomas, Routine, Trigger, New chronobox firmware; run start/stop implemented
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a) Bryerton implemented new version of the firmware. New features:
1) run start/stop state
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 11 Mar 2019 15:27, Thomas, Routine, Trigger, New chronobox firmware; run start/stop implemented
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> f) However, I found that the frontend program still consistently failed with this error when the trigger rate
> was above the maximum sustainable:
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06 Mar 2019 15:10, Thomas, Pierre, Routine, Trigger, Setup of chronobox
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Summary of setup of chronobox on network (mostly done by Pierre):
1) Hook up USB connection from chronobox to ds-proto-daq. Start serial-USB connection by doing
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06 Mar 2019 18:19, Bryerton Shaw, Routine, Trigger, Setup of chronobox
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The SDcard is currently required for operation of the device, the ext3/4 filesystem will immediately fail upon removal.
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06 Mar 2019 14:16, Thomas, Routine, General, Retested the chronobox trigger logic
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I retested the chronobox trigger generation:
1) Inserting moderate sized pulse into channel 8 of V1725-0.
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05 Mar 2019 14:20, Thomas, Routine, Hardware, Installed network card
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I installed a PCIe 1Gbps network card and configured it as a private network. The PC (ds-proto-daq) is
192.168.1.1. I guess we can make the chronobox 192.168.1.2.
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05 Mar 2019 10:36, Thomas, Routine, Digitizer, Switched to standard V1725 firmware
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It turns out that the ZLE V1725 firmware we are using only supports reading out up to 4000 samples per channel.
We need 80000 samples to readout 200us, which is requirement.
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19 Feb 2019 16:26, Pierre-A., Configuration, General, Overall HW configuration 
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For Reference,
I put a simple schematic for the Trigger/Run control.
Bryerton, please have a look. Let's try to issue 3..5 SW trigger before opening the HW trigger. |
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13 Feb 2019 16:45, Pierre, Problem, Hardware, A3818 from Marco
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Checking again Marco's A3818:
- Port #2 (third from top of card) is acting up.
- change the SFP makes no difference.
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08 Feb 2019 12:08, Thomas, Problem, Hardware, Installed Marco's A3818; didn't work
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I installed Marco's A3818 PCIe card. Didn't seem to work. I got communication errors talking to link 2. The
communication problems didn't happen right away, but happened once the run started.
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07 Feb 2019 17:30, Thomas, Routine, Software, Testing the maximum data throughput
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First check the maximum trigger rate and maximum data rate for different sample lengths (for each channels):
sample length Maximum rate MB/s CPU % (per thread)
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06 Feb 2019 14:12, Pierre, Configuration, Hardware, Extended Trigger Time Tag (ETTT)
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Confirmed this ETTT configuration is working.
ETTT Enabled [22..21] = b10
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31 Jan 2019 15:18, Pierre, Configuration, Trigger, Trigger rate
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Somehow the trigger rate was not matching the trigger source.
Find out that Link 3 was not collecting and possibly holding the fragment assembly in the main thread.
Swap Link3 <-> Link0 on the V1725, restarted.
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28 Jan 2019 01:44, Thoms, Routine, Software, Added web display of V1725 waveforms
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I added javascript webdisplay of the V1725 waveforms to the Darkside setup. You can see the waveform display here:
https://ds-proto-daq.triumf.ca/CS/webdisplay
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21 Jan 2019 13:05, Thomas, Pierre, Routine, Digitizer, Tests of V1725 baseline and triggering
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A little progress on a couple fronts:
1) We got the baseline DAC setting working correctly from both the CAEN command line tool and from the MIDAS
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17 Jan 2019 15:47, Thomas, Routine, Hardware, Added raided HD to ds-proto-daq
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Added pair of 10TB hard-drives in raid-1 to ds-proto-daq. MIDAS data files will get written to this raid volume.
[dsproto@ds-proto-daq tmp]$ df -h /data
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11 Jan 2019 11:07, Thomas, Routine, Digitizer, Data corruption for ADC channels
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I modified the analyzer so that it shows data from all four modules.
I find that there is evidence of corruption of the V1725 ADC data on a couple channels. You can see an example of a waveform with corruption in the attachment. |
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09 Jan 2019 12:22, Thomas, Routine, General, V1725 LVDS outputs
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Pierre figured out that NIM crate not working. We now see LVDS outputs from the individual channels firing.
Each set of two different channels is ganged together into a single self-trigger output. By setting the
register 0x1n84 to 3 we enable so that if either input channel fires then the self-trigger for that group fires.
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13 Dec 2018 11:02, Thomas, Routine, Hardware, Testing V1725 digitizers
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Couple weeks of work documented in one elog...
V1725 serial numbers: 455, 392, 460, 462, 474
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11 Dec 2018 15:20, Thomas, Configuration, Software, Setup elog for ds-proto-daq
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1) Install and tweak elog:
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11 Dec 2018 15:17, Thomas, Configuration, Software, Setup elog for ds-proto-daq
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1) Install and tweak elog:
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