HW-Time-Slice Firmware-Filter Software vx2740 Steering Module Reports MVM MVM Vexos MVM-Bug listing MVM TRIUMF Local DS Prototype DS Cryogenic For Shifters BCIT-31 ChronoBox Run Operation DS-DAQ
  CERN DS-Proto0 read-only backup  Not logged in ELOG logo
Message ID: 4     Entry time: 09 Jan 2019 12:22
Author: Thomas 
Type: Routine 
Category: General 
Subject: V1725 LVDS outputs 
Pierre figured out that NIM crate not working.  We now see LVDS outputs from the individual channels firing. 
Each set of two different channels is ganged together into a single self-trigger output.  By setting the
register 0x1n84 to 3 we enable so that if either input channel fires then the self-trigger for that group fires.

Bryerton provided CDM outputting 50MHz clock; all V1725s now running with external clock.

Modified frontend to readout 4 modules and 16 channels per module.

Still need to modify the analyzer to show data for all 4 modules.
ELOG V3.1.4-cb3afcd8