A little progress on a couple fronts:

1) We got the baseline DAC setting working correctly from both the CAEN command line tool and from the MIDAS
frontend.  Needed to add some extra sleep before the DAC settings were modified.

2) We figured out how to set the threshold for self-triggering on each channel. It is actually register 0x1n60
for this firmware.  The threshold is defined relative to the online calculated baseline. The threshold is
settable from the ODB.  However, the polarity of the triggering is currently hard-coded to be negative (bit 6 of
register 0x1n64).

3) We could confirm that the LVDS outputs from the V1725 appeared and disappeared as expected when the
self-trigger threshold was changed.

4) We added some basic documentation in Markdown here:

https://bitbucket.org/ttriumfdaq/dsproto_daq/src/master/