This section describes particular features and routines that are specific to x86 targets in any of the following ways:
For x86 targets, the following floating-point routines are supported. These routines are also available without a hardware floating-point processor by selecting INCLUDE_SW_FP for inclusion in the project facility VxWorks view. For more information about configuring the software floating-point emulation library, see Software Floating-Point Emulation. See mathALib and the individual manual entries for descriptions of each routine.
The file sysLib.c contains the global variables shown in Table D-1.
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The following routines read x86 register values, and require one parameter, the task ID:
Table D-2 shows additional architecture-specific routines. Other architecture-specific routines are described throughout this section.
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STATUS pentiumBts (char * pFlag) |
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VxWorks for the x86 supports both software and hardware breakpoints. When you set a software breakpoint, VxWorks replaces an instruction with an int 3 software interrupt instruction. VxWorks restores the original code when the breakpoint is removed. The instruction queue is purged each time VxWorks changes an instruction to a software break instruction.
A hardware breakpoint uses the processor's debug registers to set the breakpoint. The x86 architectures have four breakpoint registers. If you are using the target shell, you can use the bh( ) routine to set hardware breakpoints. The routine is declared as follows:
STATUS bh ( INSTR *addr, /* where to set breakpoint, or */ /* 0 = display all breakpoints */ int task, /* task to set breakpoint; */ /* 0 = set all tasks */ int count, /* number of passes before hit */ int type, /* breakpoint type; see below */ INSTR *addr0 /* ignored for x86 targets */ )
The bh( ) routine takes the following types in parameter type:
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If you are using the target shell, note that the VxWorks disassembler l( ) does not support 16-bit code compiled for earlier generations of 80x86 processors. However, the disassembler does support 32-bit code for both the i386 and i486 processors.