e!8`( _.Freescale i.MX6 Quad SABRE Smart Device Board!fsl,imx6q-sabresdfsl,imx6qchosenaliases9,/soc/aips-bus@02000000/spba-bus@02000000/serial@02020000'4/soc/aips-bus@02100000/serial@021e8000'.ipgperpwm@02084000!fsl,imx6q-pwmfsl,imx27-pwm@@ T>.ipgperpwm@02088000!fsl,imx6q-pwmfsl,imx27-pwm@ U>.ipgperpwm@0208c000!fsl,imx6q-pwmfsl,imx27-pwm@ V>.ipgperflexcan@02090000 @ nflexcan@02094000 @@ ogpt@02098000!fsl,imx6q-gpt @ 7wx.ipgpergpio@0209c000!fsl,imx6q-gpiofsl,imx35-gpio @BCgpio@020a0000!fsl,imx6q-gpiofsl,imx35-gpio @DEgpio@020a4000!fsl,imx6q-gpiofsl,imx35-gpio @@FGgpio@020a8000!fsl,imx6q-gpiofsl,imx35-gpio @HIgpio@020ac000!fsl,imx6q-gpiofsl,imx35-gpio @JKgpio@020b0000!fsl,imx6q-gpiofsl,imx35-gpio @LMgpio@020b4000!fsl,imx6q-gpiofsl,imx35-gpio @@NOkpp@020b8000 @ Rwdog@020bc000!fsl,imx6q-wdtfsl,imx21-wdt @ Pwdog@020c0000!fsl,imx6q-wdtfsl,imx21-wdt @ Q ^disabledccm@020c4000!fsl,imx6q-ccm @@WX anatop@020c8000#!fsl,imx6q-anatopsysconsimple-bus $16regulator-1p1@110!fsl,anatop-regulatorvdd1p1& 5>Vj| 5regulator-3p0@120!fsl,anatop-regulatorvdd3p0&*>0Vj |( 3@regulator-2p5@130!fsl,anatop-regulatorvdd2p5&>)0Vj0|)0regulator-vddcore@140!fsl,anatop-regulatorcpu& > Vj@|p  regulator-vddpu@140!fsl,anatop-regulatorvddpu& > Vj@| p  regulator-vddsoc@140!fsl,anatop-regulatorvddsoc& > Vj@|p  usbphy@020c9000"!fsl,imx6q-usbphyfsl,imx23-usbphy  ,  usbphy@020ca000"!fsl,imx6q-usbphyfsl,imx23-usbphy  -  snvs@020cc000!fsl,sec-v4.0-monsimple-bus  @snvs-rtc-lp@34!fsl,sec-v4.0-mon-rtc-lp4Xepit@020d0000 @ 8epit@020d4000 @@ 9src@020d8000!fsl,imx6q-srcfsl,imx51-src @[`%gpc@020dc000!fsl,imx6q-gpc @YZiomuxc-gpr@020e0000!fsl,imx6q-iomuxc-gprsyscon8ldb@020e0008!fsl,imx6q-ldbfsl,imx53-ldb2 ^disabled@!"'()*8.di0_plldi1_plldi0_seldi1_seldi2_seldi3_seldi0di1lvds-channel@0 6 ^disabledlvds-channel@1 6 ^disableddcic@020e4000@@ |dcic@020e8000@ }sdma@020ec000!fsl,imx6q-sdmafsl,imx35-sdma@ .ipgahb!fsl,imx6q-ipu@@ .busdi0di1Jipu@02800000>!fsl,imx6q-ipu@ .busdi0di1Jcpuscpu@0!arm,cortex-a9~cpuQ bOtx2 0 ~sl(h).armpll2_pfd2_396msteppll1_swpll1_syscpu@1!arm,cortex-a9~cpuQcpu@2!arm,cortex-a9~cpuQcpu@3!arm,cortex-a9~cpuQregulators !simple-bususb_otg_vbus!regulator-fixed usb_otg_vbus&LK@>LK@   wm8962_supply!regulator-fixedwm8962-supply  gpio-keys !gpio-keysvolume-up Volume Up svolume-down Volume Down rsound.!fsl,imx6q-sabresd-wm8962fsl,imx-audio-wm8962 wm8962-audioHeadphone JackHPOUTLHeadphone JackHPOUTRExt SpkSPKOUTLExt SpkSPKOUTRMICBIASAMICIN3RMICBIASDMICMICBIASDMICDATDMIC #address-cells#size-cellsmodelcompatibleserial0serial1serial2serial3serial4gpio0gpio1gpio2gpio3gpio4gpio5gpio6device_typereg#interrupt-cellsinterrupt-controllerlinux,phandleclock-frequencyinterrupt-parentrangesinterruptsinterrupt-names#dma-cellsdma-channelsclocksreg-namesclock-namesdmasdma-namesfsl,gpmi-dma-channelstatuscache-unifiedcache-levelarm,tag-latencyarm,data-latencypinctrl-namespinctrl-0fsl,fifo-depthfsl,ssi-dma-eventsfsl,mode#pwm-cellsgpio-controller#gpio-cells#clock-cellsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-delay-reg-offsetanatop-delay-bit-shiftanatop-delay-bit-width#reset-cellsgprcrtcsfsl,sdma-ram-script-namefsl,pinsfsl,usbphyfsl,usbmiscvbus-supplydisable-over-current#index-cellsphy-modebus-widthcd-gpioswp-gpiosDCVDD-supplyDBVDD-supplyAVDD-supplyCPVDD-supplyMICVDD-supplyPLLVDD-supplySPKVDD1-supplySPKVDD2-supplygpio-cfg#crtc-cellsresetsnext-level-cacheoperating-pointsclock-latencyarm-supplypu-supplysoc-supplygpioenable-active-highlabellinux,codessi-controlleraudio-codecaudio-routingmux-int-portmux-ext-port